Published Paper Details:

The main objective of this work is to study the various optimization techniques for reducing power consumption in VLSIcircuit systems without any tradeoff with the desired and necessary tasks it has to perform. As VLSI circuit systems are used in a wide range of applications, there is a need to meet the design metrics of embedded systems like power, time to market, flexibility, robustness, cost, performance and many more. Power consumption is particularly an important design metric for battery powered embedded systems (small sized batteries can have very limited lifetime). Power optimization can be implemented using various techniques like Dynamic Voltage scaling, Dynamic Frequency Scaling, Software Optimization, Power down mode and Sleep mode. However, power consumption is also very important in systems running from power supplies, since the IC chips can become hot very quickly when their clock speeds are increased. Minimizing power consumption in such circumstances is very much desirable to improve reliability and system cost.