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  Published Paper Details:

  Paper Title

HIGH SPEED FULL ADDER DESIGN WITH ANALOG SWITCH LEVEL RESTORATION TECHNIQUE.

  Authors

  Srikanth Koniki,  Somanaidu,  Shashikanth ,  Nehru

  Keywords

Full adder circuits, cadence virtuoso tool and Transistor count.

  Abstract


In the field of very large scale integration (VLSI) till date there are a plenty of 1-bit full adder. In this paper we have implementation the comparative analysis of 16 transistors Transmission function full adder circuit (TFA) and 20 transistors modified conventional full adder circuit. And we compare with different pass transistors for the decrease the count of transistors considering various elements in like power, delay and power delay product .These constraints are calculated by using cadence virtuoso platform in 180nm Technology. The full adder is part of the processor we can increases the n-bit full adder to implement the complex circuits.

  IJCRT's Publication Details

  Unique Identification Number - IJCRT1802384

  Paper ID - 182648

  Page Number(s) - 370-375

  Pubished in - Volume 6 | Issue 1 | February 2018

  DOI (Digital Object Identifier) -   

  Publisher Name - IJCRT | www.ijcrt.org | ISSN : 2320-2882

  E-ISSN Number - 2320-2882

  Cite this article

  Srikanth Koniki,  Somanaidu,  Shashikanth ,  Nehru,   "HIGH SPEED FULL ADDER DESIGN WITH ANALOG SWITCH LEVEL RESTORATION TECHNIQUE.", International Journal of Creative Research Thoughts (IJCRT), ISSN:2320-2882, Volume.6, Issue 1, pp.370-375, February 2018, Available at :http://www.ijcrt.org/papers/IJCRT1802384.pdf

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ISSN: 2320-2882
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Journal Starting Year (ESTD) : 2013
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ISSN and 7.97 Impact Factor Details


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ISSN
ISSN: 2320-2882
Impact Factor: 7.97 and ISSN APPROVED
Journal Starting Year (ESTD) : 2013
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