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INTERNATIONAL JOURNAL OF CREATIVE RESEARCH THOUGHTS - IJCRT (IJCRT.ORG)
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ISSN Approved Journal No: 2320-2882 | Impact factor: 7.97 | ESTD Year: 2013
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Paper Title
DESIGN AND IMPLEMENTATION OF FPGA BASED 32-BIT WALLACE AND SYSTOLIC MULTIPLIERS
Authors
P. Vamsi Krishna, K.Nirosha, G.Amala, N.Manikanta, J. Venkata Suman
Keywords
Systolic Multiplier, Wallace Multiplier, Verilog HDL, FPGA, Digital Signal Processing
Abstract
Now a days in VLSI technology size, power, speed and cost are the main design considerations in any circuits. As the number of added operations in normal multipliers are more which results in increase in delay. Therefore the circuits designed with normal multipliers will consume more power and possess less speed. Multipliers play a vital role in digital signal processing applications. In this paper, design and implementation of FPGA based 32 bit Wallace multiplier and Systolic multiplier has been done. These multipliers were designed using Verilog HDL, simulation and synthesis is done in both RTL compiler using Xilinx Vivado and implemented on Zynq 7000 series FPGA board.
IJCRT's Publication Details
Unique Identification Number - IJPUB1802029
Paper ID - 185089
Page Number(s) - 162 - 166
Pubished in - Volume 6 | Issue 2 | April 2018
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Publisher Name - IJCRT | www.ijcrt.org | ISSN : 2320-2882
E-ISSN Number - 2320-2882
Cite this article
P. Vamsi Krishna, K.Nirosha, G.Amala, N.Manikanta, J. Venkata Suman, "DESIGN AND IMPLEMENTATION OF FPGA BASED 32-BIT WALLACE AND SYSTOLIC MULTIPLIERS ", International Journal of Creative Research Thoughts (IJCRT), ISSN:2320-2882, Volume.6, Issue 2, pp.162 - 166, April 2018, Available at :http://www.ijcrt.org/papers/IJPUB1802029.pdf
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ISSN: 2320-2882 Impact Factor: 7.97 and ISSN APPROVED Journal Starting Year (ESTD) : 2013
ISSN and 7.97 Impact Factor Details
ISSN: 2320-2882 Impact Factor: 7.97 and ISSN APPROVED Journal Starting Year (ESTD) : 2013
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