Published Paper Details:

High speed and high resolution analog-to-digital converters (ADCs) are in greater demand due to the quick development of fast digital signal processors constructed utilizing very-large-scale integration (VLSI) technology. These ADCs can be used in fabrication processes and are designed for digital circuits and systems. The ADCs are the main bottleneck in the majority of mixed-signal designs since the scaling of VLSI technology significantly restricts the dynamic range that is available for the interface of analogue and digital signals. One of the ADC architectures, delta-sigma oversampling ADCs, provide an ideal balance between circuit complexity, cost, and power consumption. Analogue components with poor precision can nonetheless deliver high accuracy. The Sigma-Delta (SD) ADC is one of the best ADC topologies for lowvoltage and low-power applications because its loop-filter is its main design bottleneck. The construction of a low pass continuous time delta sigma modulator is the main goal of this effort. We'll create a method for analyzing and synthesizing lowpass continuous time sigma-delta?? modulators. Using continuous-time filters and this technique, it is possible to create ?? modulators from discrete-time topologies. Utilizing a discrete simulator and discretizing a continuous-time model are the foundations of the analysis technique.