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  Published Paper Details:

  Paper Title

Design of an Energy Efficient multiplexer using Adiabatic Diode Logic for Low Power Applications

  Authors

  Aswini Addepalli,  ANJALI,  SATYASRI,  SIVAPRIYA,  K.N.V.S.VIJAYA LAKSHMI

  Keywords

Adiabatic Logic, CPL, PFAL, EEPL, ADDL, T-Spice

  Abstract


Power consumption and delay optimization has been the main concerns for the VLSI technology. In this project, we propose a new adiabatic technique using diode-connected transistors. This technique emphasizes on reduction of power by lowering the non-recoverable power consumption in adiabatic circuits. This technique achieves full adiabatic operation by providing separate charging and discharging paths. The PMOS devices provide the charging path while the diode-connected NMOS devices provide a low-resistance discharge path which helps in the reduction of power dissipation in the circuit. In this project, we have used the T-Spice tool to implement

  IJCRT's Publication Details

  Unique Identification Number - IJCRT2303900

  Paper ID - 233498

  Page Number(s) - h604-h611

  Pubished in - Volume 11 | Issue 3 | March 2023

  DOI (Digital Object Identifier) -   

  Publisher Name - IJCRT | www.ijcrt.org | ISSN : 2320-2882

  E-ISSN Number - 2320-2882

  Cite this article

  Aswini Addepalli,  ANJALI,  SATYASRI,  SIVAPRIYA,  K.N.V.S.VIJAYA LAKSHMI,   "Design of an Energy Efficient multiplexer using Adiabatic Diode Logic for Low Power Applications", International Journal of Creative Research Thoughts (IJCRT), ISSN:2320-2882, Volume.11, Issue 3, pp.h604-h611, March 2023, Available at :http://www.ijcrt.org/papers/IJCRT2303900.pdf

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ISSN: 2320-2882
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Journal Starting Year (ESTD) : 2013
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ISSN and 7.97 Impact Factor Details


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ISSN: 2320-2882
Impact Factor: 7.97 and ISSN APPROVED
Journal Starting Year (ESTD) : 2013
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