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  Published Paper Details:

  Paper Title

FPGA IMPLEMENTATION AND COMPARATIVE ANALYSIS OF AN EFFICIENT MULTIPLIER

  Authors

  Komal Ganer,  Dr. S. S. Shriramwar

  Keywords

Vedic multiplier, kogge stone ,Urdhva Triyakbhyam, Xilinx ISE12.3

  Abstract


This a new architecture for performing design-efficient multipliers using Kogge Stone Adders with Mux and Vedic Multiplication. design of an efficient 32x32 bit Vedic multiplier using the UrdhvaTriyakabhyam (UT) sutra of Vedic mathematics. Vedic mathematics is based on 16 formulae constructed by Sri Bharati Krishna Tirthaji. Multiplication operation is the most vital operation in many numeric computations.The Adder which is used to implement the Kogge Stone Adder, which utilizes MUX, a parallel prefix form of the Carry Look Ahead Adder, and it is a widely used adder in today's industry. One of the most reliable Vedic mathematics scriptures, UrdhvaTriyakbhyam, makes a difference in the process of actual multiplication. The adder used is widely known for designing the fastest adder possible because it produces a carry signal in O (logn) time. Offering Kogge Stone Adders using MUX offers fewer components with less path delays and better rates than other existing Kogge Stone Adders and other Adders. In this study, we have used KSA in Mux and Vedic Multiplication. This tentative procedure estimates the performance of the proposed design in terms of logic and route delay. Experimental results show that multipliers using the kogge stone adder and Vedic Multiplication perform faster than other adders. The proposed algorithm was developed via verilog HDL. The implementation was done using Xilinx ise 12.3.

  IJCRT's Publication Details

  Unique Identification Number - IJCRT2108035

  Paper ID - 210470

  Page Number(s) - a233-a238

  Pubished in - Volume 9 | Issue 8 | August 2021

  DOI (Digital Object Identifier) -   

  Publisher Name - IJCRT | www.ijcrt.org | ISSN : 2320-2882

  E-ISSN Number - 2320-2882

  Cite this article

  Komal Ganer,  Dr. S. S. Shriramwar,   "FPGA IMPLEMENTATION AND COMPARATIVE ANALYSIS OF AN EFFICIENT MULTIPLIER", International Journal of Creative Research Thoughts (IJCRT), ISSN:2320-2882, Volume.9, Issue 8, pp.a233-a238, August 2021, Available at :http://www.ijcrt.org/papers/IJCRT2108035.pdf

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ISSN: 2320-2882
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Journal Starting Year (ESTD) : 2013
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ISSN and 7.97 Impact Factor Details


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ISSN: 2320-2882
Impact Factor: 7.97 and ISSN APPROVED
Journal Starting Year (ESTD) : 2013
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