Published Paper Details:

This paper proposes the methodology for implementing an IP core for the FPGA and custom GNU radio block for a simple flowgraph in GNU radio to be run on Soc. A simple IP core such as multiplier is implemented in Hardware Description Languages (HDL), and driven as GNU Radio Block. The focus of this paper is on testing the implemented design on Zedboard and GNU radio in combination with Vivado 2016.4. Firstly in the beginning of the paper we will have a general introduction to a common method to program any FPGA device. Further, it has description and specification of the Zedboard and FPGA used. A brief description about the softwares used. An overview of the custom IP design and AXI peripheral bus has been discussed in the paper. This paper also gives a brief idea about building own project and creating a binary file and creation bootable SD card for Zedboard with the custom IP in it. Finally on the Software side, about GNU Radio and creating custom Blocks in GUN Radio Companion(GRC) is discussed in the paper. Analog Devices supports this implementation methodology. This paper is concluded with possible modification in the proposed methodology.