Published Paper Details:

As technologies advances, always there is need for development of portable and highly efficient communication systems and protocols. This paper describes the design of modified low density parity check encoder that can be employed in IEEE 802.3an 10-Gigabit Ethernet base station standard with required encoding rate. This modified encoder design adopts both general and Richardson Ubranke (RU) methods to achieve low complexity and efficient encoding. The advantage of this modified encoder is compatibility with all the types of recently developed decoder designs. There is no swapping of column or row required as both general and RU methods are involved in encoding process and also back substitution method is adopted for inverse multiplication process. ASIC implementation of the high-speed proposed encoder uses wave pipelining technique to reduce the critical path delay and uses the temporary shift registers to reduce memory storage. Implementation of high-speed encoder is reported with delay of 3.25ns and power dissipation of 489.75mW with gpdk 180nm technology using wave pipelining technique.