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  Published Paper Details:

  Paper Title

CROSSTALK AVOIDANCE WITH LOW POWER AND LOW AREA IN ASIC APPLICATIONS

  Authors

  Battari Obulesu,  M. Anitha,  P. Bhavani,  C. Archana,  N. Chaitanya Jyothi

  Keywords

Crosstalk noise; 18T full adder; Bus encoding; Crosstalk avoidance; 180nm technology; Low power dissipation;

  Abstract


Cross talk is a common issue in ASIC design for technologies lesser than 180nm. It is more complicated in larger designs like System on Chip and Network on chip. Crosstalk noise effects the timing performance and degrades the signal which is passing from one module to another module in a chip. Generally ASIC implementations use special crosstalk removal circuits which consume more power and more area. In order to avoid crosstalk and delay we have used �Bus Encoding Method�. Bus Encoding Method aims to reduce the overall activity factor and there by reduces the consumption in system. This method avoids the crosstalk by low power and low area. We designed 18T Full adder circuit as testing sequence for crosstalk analysis. crosstalk avoidance can be achieved by low area and low power.

  IJCRT's Publication Details

  Unique Identification Number - IJCRT2004287

  Paper ID - 193530

  Page Number(s) - 2115-2122

  Pubished in - Volume 8 | Issue 4 | April 2020

  DOI (Digital Object Identifier) -   

  Publisher Name - IJCRT | www.ijcrt.org | ISSN : 2320-2882

  E-ISSN Number - 2320-2882

  Cite this article

  Battari Obulesu,  M. Anitha,  P. Bhavani,  C. Archana,  N. Chaitanya Jyothi,   "CROSSTALK AVOIDANCE WITH LOW POWER AND LOW AREA IN ASIC APPLICATIONS", International Journal of Creative Research Thoughts (IJCRT), ISSN:2320-2882, Volume.8, Issue 4, pp.2115-2122, April 2020, Available at :http://www.ijcrt.org/papers/IJCRT2004287.pdf

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ISSN: 2320-2882
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Journal Starting Year (ESTD) : 2013
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ISSN and 7.97 Impact Factor Details


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ISSN: 2320-2882
Impact Factor: 7.97 and ISSN APPROVED
Journal Starting Year (ESTD) : 2013
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