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  Published Paper Details:

  Paper Title

DESIGN OF A FULL ADDER WITH FAULT-TOLERANT USING A PARALLEL ADDER

  Authors

  S. Tejaswini,  Dr. Bindu S

  Keywords

Carry Select Adder, Ripple Carry Adder, Exact Full Adder, Fault Tolerant Full Adder, Parallel Adder, ModelSim, Xilinx ISE.

  Abstract


The creation of mobile complementary metal oxide semiconductors for signal and image processing applications requires reduced transistor count and switching. The adder serves as the foundation for all mathematical operations performed by the processing units. The accuracy and size of an error-tolerant application for a parallel adder are optimized using a faithful approximation. The parallel adder suggested the carry select addition generates the vast majority of n/2m blocks with the right logic. The least significant approximation component of the adder is constructed using the EFA and FTFA cell.

  IJCRT's Publication Details

  Unique Identification Number - IJCRT2208077

  Paper ID - 224109

  Page Number(s) - a580-a586

  Pubished in - Volume 10 | Issue 8 | August 2022

  DOI (Digital Object Identifier) -   

  Publisher Name - IJCRT | www.ijcrt.org | ISSN : 2320-2882

  E-ISSN Number - 2320-2882

  Cite this article

  S. Tejaswini,  Dr. Bindu S,   "DESIGN OF A FULL ADDER WITH FAULT-TOLERANT USING A PARALLEL ADDER", International Journal of Creative Research Thoughts (IJCRT), ISSN:2320-2882, Volume.10, Issue 8, pp.a580-a586, August 2022, Available at :http://www.ijcrt.org/papers/IJCRT2208077.pdf

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ISSN: 2320-2882
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Journal Starting Year (ESTD) : 2013
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ISSN and 7.97 Impact Factor Details


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ISSN: 2320-2882
Impact Factor: 7.97 and ISSN APPROVED
Journal Starting Year (ESTD) : 2013
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