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  Published Paper Details:

  Paper Title

OPTIMIZED MIX COLUMN ARCHITECTURE DESIGN AND FAULT DETECTION SCHEME FOR THE ADVANCED ENCRYPTION STANDARD

  Authors

  MANOHAR.C.M,  SUDHA.H

  Keywords

AES, Mix Column, Encryption, Decryption, Fault Detection, VLSI.

  Abstract


With the evolution of the Internet, there has been a huge spurt in online transactions and also an increase in sharing of private, confidential and sensitive information over the web. This in turn has increased the requirement of highly secure and swift methodologies to protect such data using modern cryptographic techniques such as the Advanced Encryption Standard (AES). AES is an endorsed cryptographic algorithm that can be utilized to secure electronic information. AES was replacing the old Data Encryption Standard (DES) with more security. In order to achieve the same, this project discusses significant and novel modifications to the existing hardware architecture of the mix column step of the AES algorithm. And also implement the fault detect scheme for AES.

  IJCRT's Publication Details

  Unique Identification Number - IJCRT2008014

  Paper ID - 196536

  Page Number(s) - 92-100

  Pubished in - Volume 8 | Issue 8 | August 2020

  DOI (Digital Object Identifier) -   

  Publisher Name - IJCRT | www.ijcrt.org | ISSN : 2320-2882

  E-ISSN Number - 2320-2882

  Cite this article

  MANOHAR.C.M,  SUDHA.H,   "OPTIMIZED MIX COLUMN ARCHITECTURE DESIGN AND FAULT DETECTION SCHEME FOR THE ADVANCED ENCRYPTION STANDARD", International Journal of Creative Research Thoughts (IJCRT), ISSN:2320-2882, Volume.8, Issue 8, pp.92-100, August 2020, Available at :http://www.ijcrt.org/papers/IJCRT2008014.pdf

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ISSN: 2320-2882
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Journal Starting Year (ESTD) : 2013
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ISSN and 7.97 Impact Factor Details


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ISSN
ISSN: 2320-2882
Impact Factor: 7.97 and ISSN APPROVED
Journal Starting Year (ESTD) : 2013
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