Published Paper Details:

For their ability to have higher resolutions and operating speeds, current steering DACs (CSDAC) are most preferred to be used in mixed-signal designs. To improve the static and dynamic linearity in such DACs, compensation techniques such as dynamic element matching (DEM) were introduced, which can be achieved by random swapping of connections between the unary current sources of the DAC. DEM techniques mitigate the amplitude and timing mismatches in a DAC and improve its performance. Various DEM techniques such as GRTC, RRBS and Nested Segment were designed for 3-bit resolution in 130nm CMOS technology and their performances were compared. Due to its deterministic approach and the elimination of random counters, the nested segmented DEM technique provides a better performance compared to other DEM techniques. A reduction of 15.84% in delay and 21.126% in power can be observed in the nested segment structure, compared to GRTC and RRBS techniques respectively. The elimination of random number generators can also reduce the area required for the DEM implementation.